ISO1541 TI Low-Power Bidirectional I2C Isolator Data Sheet
Download PDF datasheet for Texas Instruments ISO1541 Low-Power Bidirectional I2C Isolator (EN) 21 pages SLLSEB6A 2012 zip
Description
This PDF datasheet is for the TI ISO1541 I2C isolator.
Texas Instruments ISO1541 Low-Power Bidirectional I2C Isolator
ISO1541D
ISO1541DR
The ISO1541 is a low-power, bidirectional isolators that are compatible with I2C interfaces. These devices have their logic input and output buffers separated by TI’s Capacitive Isolation technology using a silicon dioxide (SiO2) barrier. When used in conjunction with isolated power supplies, these devices block high voltages, isolate grounds, and prevent noise currents from entering the local ground and interfering with or damaging sensitive circuitry.
This isolation technology provides for function, performance, size, and power consumption advantages when compared to opto-couplers. The ISO1541 enables a complete isolated I2C interface to be implemented within a small form factor.
The ISO1541 has a bidirectional data and a unidirectional clock channel. The ISO1541 is useful in applications that have a single Master.
Isolated bidirectional communications is accomplished within these devices by offsetting the Side 1 Low-Level Output Voltage to a value greater than the Side 1 High-Level Input Voltage thus preventing an internal logic latch that otherwise would occur with standard digital isolators.
(PDF) DATASHEET (ENGLISH)
CONTENTS
ISO1541 PIN FUNCTIONS
Table 1. FUNCTION TABLE
ABSOLUTE MAXIMUM RATINGS
THERMAL INFORMATION
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
SWITCHING CHARACTERISTICS
TIMING CHARACTERISTICS
PARAMETER MEASUREMENT INFORMATION
Figure 1. Test Diagram
Figure 2. tLoop1 Setup and Timing Diagram
Figure 3. Common-Mode Transient Immunity Test Circuit
Figure 4. tUVLO Test Circuit and Timing Diagrams
Table 3. IEC 60747-5-2 INSULATION CHARACTERISTICS
Table 4. IEC 60664-1 RATINGS TABLE
Table 5. REGULATORY INFORMATION
IEC SAFETY LIMITING VALUES
ISO1541 THERMAL DERATING
APPLICATION INFORMATION
– I2C Bus Overview
– Figure 6. I2C BUS
– Figure 7. Timing Diagram of a Complete Data Transfer
– Isolator Functional Principle
– Figure 9. SDA Channel Design and Voltage Levels at SDA1
– Figure 10. SDA Channel Timing in Receive and Transmit Directions
TYPICAL APPLICATION CIRCUIT
– Figure 11. Isolated I2C Data Acquisition System
TYPICAL CHARACTERISTICS
PACKAGING INFORMATION
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